1. Field of the Invention
The present invention relates to the field of packages for semiconductor devices and packaged devices, and more particularly, to the field of high current hermetic packages and hermetically packaged high current devices.
2. Background Information
Semiconductor devices have been packaged in a vast variety of package configurations. These include both hermetic (gas-tight) and non-hermetic (gas-permeable) packages. As the desired operating frequency of hermetically packaged power devices is increased, a number of problems develop with prior art packages. Prior art hermetic packages for power devices generally include a metallic case or can. Such metallic cans have device leads which extend through glass seals in the sides of the can. These glass seals bond to both the lead and the material of the can in order to hermetically seal the passage of each lead through the can. The chip in which the device is contained is normally bonded to the bottom of the can and the contact pads on the top of the device are connected to the through-the-can leads by wire bonds. After the completion of mounting and bonding the chip, a cover or lid is sealed on top of the can to hermetically seal the package. Such packages present a number of disadvantages. First, since the wire bonds are normally made with round wire on the order of about 1 mil (0.025 mm) in diameter for low power integrated circuits and 30-40 mils (0.76-1.02 mm) in diameter for power or high current devices and are about 0.3-0.5 inch (0.76-1.27 cm) long, they have a significant inductance in their own right. Second, the through-the-can leads are round wires about 20-50 mils (1-3 mm) in diameter and about 0.3-0.5 inch (0.76-1.27 cm) long. Thus, these leads also have a significant inductance in their own right. Third, the wires have a significant resistance which adds to the on-resistance of the device. Fourth, in order for the coefficient of thermal expansion of the can and the semiconductor device to be sufficiently equal that the device does not become debonded from the can and to prolong the life of the glass seals, the cans are normally made of Kovar.RTM. or Invar.RTM. or other similar low expansion coefficient metals. Such metals are magnetic materials and consequently, have the effect of increasing the inductance of the bond wires and of the through-the-can leads. Fifth, glass seals are unreliable over long periods of time and eventually begin to leak. Sixth, the metals used in the can and leads suffer from higher electrical and thermal resistivity than copper. Seventh, such packages have the disadvantage that they are substantially larger both in major surface area and volume than the semiconductor chip and weigh many times what the chip weighs. The net result, is that the final packaged chip is in a heavy, bulky container which has a relatively high inductance. That relatively high inductance is undesirable for high frequency operation of the device, because when coupled with the very high di/dt characteristic of high frequency operation, this inductance leads to very large Ldi/dt voltage disturbances such as overshoots and undershoots, where L is the lead inductance. This problem increases with increasing frequency of operation because inductive effects increase with increasing signal frequency.
A further problem which is encountered with the packaging of high current devices is that where a single wire bond connects a contact pad to the lead of the can, all of the current flowing through that lead enters the contact pad at the bond between the wire and the pad. Where the contact pad contacts a substantial area of the semiconductor device, substantial lateral currents must flow in the contact pad to distribute the current throughout the device. This has the disadvantage that for high current devices, the current carrying capacity of a thin contact pad can easily be exceeded in the vicinity of the wire bond.
The above-identified related application Ser. No. 07/367,525 discloses a package which overcomes the inductance and size problems of the prior art hermetic packages. However, the provisions of its preferred embodiment for limiting lateral current flow in the contact pad of the device can be improved upon. The above-identified application Ser. No. 07/375,569 provides a structure which limits lateral current flow, but is more complex to assemble the preferred application Ser. No. 07/367,525 structure.
Consequently, there is a need for a compact, hermetic, non-magnetic package for high frequency, high current power devices which limits lateral currents in chip contact pads without requiring unduly complex assembly.